Job opportunity
PCIe Verification Engineer – Shape Next-Gen Processors
AMD
AMD is seeking a Digital Design Verification Engineer for the PCIe Subsystem in Canada. The role focuses on developing and verifying PCIe features using SystemVerilog/UVM testbenches, and collaborating with architects, RTL designers and validation teams across sites and time zones.
The candidate will own verification tasks, create test plans, and advance automation while contributing to memory sub-system architecture discussions. Location options include Markham, Ontario, or Vancouver, Canada.
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Apply on source site The candidate will own verification tasks, create test plans, and advance automation while contributing to memory sub-system architecture discussions. Location options include Markham, Ontario, or Vancouver, Canada.
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