Job opportunity
Design Verification Engineer at Qualcomm
Qualcomm
Advance your engineering career as a Design Verification Engineer with Qualcomm in Canada. This role focuses on ASIC design verification, pre-silicon test planning, and enhancing verification automation.
Qualcomm Canada ULC seeks a talented Design Verification Engineer to manage the complete verification lifecycle for digital power IPs. Candidates should bring at least 2 years of experience with ASIC design and verification methodologies, including SystemVerilog-UVM. The position demands strong skills in testbench development and the ability to enhance verification efficiency through automation.
Key Responsibilities:
• Manage the complete verification lifecycle from concept to post-silicon
• Develop pre-silicon test plans for digital power IPs
• Implement advanced verification methodologies using SystemVerilog-UVM
• Automate verification processes to enhance efficiency
• Engage in coverage and assertion model development
Requirements:
• Bachelor's degree in Engineering or related field
• 2+ years of experience in ASIC design and verification
• Knowledge of digital design concepts and RTL languages
• Familiarity with automation scripting using Perl or Python
• Understanding of computer architecture fundamentals
Utilize your skills in ASIC design verification and automation at Qualcomm to impact next-generation technology.
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Apply on source site Qualcomm Canada ULC seeks a talented Design Verification Engineer to manage the complete verification lifecycle for digital power IPs. Candidates should bring at least 2 years of experience with ASIC design and verification methodologies, including SystemVerilog-UVM. The position demands strong skills in testbench development and the ability to enhance verification efficiency through automation.
Key Responsibilities:
• Manage the complete verification lifecycle from concept to post-silicon
• Develop pre-silicon test plans for digital power IPs
• Implement advanced verification methodologies using SystemVerilog-UVM
• Automate verification processes to enhance efficiency
• Engage in coverage and assertion model development
Requirements:
• Bachelor's degree in Engineering or related field
• 2+ years of experience in ASIC design and verification
• Knowledge of digital design concepts and RTL languages
• Familiarity with automation scripting using Perl or Python
• Understanding of computer architecture fundamentals
Utilize your skills in ASIC design verification and automation at Qualcomm to impact next-generation technology.
#J-18808-Ljbffr