Job opportunity
System-Level Memory IP Validation Engineer
Synopsys Inc
Synopsys Inc. is seeking a System Level Test Engineer in the Ottawa area to own memory interface IP validation (DDR, LPDDR, HBM) in the lab. You will bring up silicon, validate training, and characterize margins across PVT corners, with hands-on work on scopes, analyzers, and automated pipelines.
You will collaborate with firmware and design teams, write plans and reports, and support customer deployments. The role emphasizes rapid problem-solving and reproducible validation in a dialog with IP
#J-18808-Ljbffr
Apply on source site You will collaborate with firmware and design teams, write plans and reports, and support customer deployments. The role emphasizes rapid problem-solving and reproducible validation in a dialog with IP
#J-18808-Ljbffr