Job opportunity
Senior SoC RTL Design Engineer | Hybrid AI Chips
Tenstorrent Unlisted/Referral Jobs
Tenstorrent is seeking a Staff Digital Design Engineer to shape high-performance IP blocks and SoC architectures for AI workloads. The role blends microarchitecture, RTL implementation, and performance-aware design in a hybrid setting.
Ideal candidates will have architecture experience, Verilog/VHDL proficiency, and comfort with ASIC flows. You will collaborate across teams to push power, performance, and area efficiency while contributing to validation and backend readiness.
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Apply on source site Ideal candidates will have architecture experience, Verilog/VHDL proficiency, and comfort with ASIC flows. You will collaborate across teams to push power, performance, and area efficiency while contributing to validation and backend readiness.
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